When program flash is empty, it works fine without any problem and here is result of start GDB with command line Source Code.
Hi, could you provide us with a binary for reproduction purposes? Best regards, Niklas. Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
Hi, I think that I found some more informations. Problem is on the internal watch dog. Our code enable this watch dog early as is possible during boot. Here is code used on demontration. This user code works without problem: C Source Code.
Hi Jiri, Thanks for providing a reproduction binary. I could reproduce this issue. Any news? Did you made some decision on about bug fix date? Hi Jiri, sorry about the delay in response.
There will be an update of this thread later this week. Not sure if there is any fix needed from our side. If enabling the watchdog inhibits connecting to the target, I assume the following is the case: The watchdog also resets the debug logic of the device, not really good but basically works. JLinkScript allow to write script to solve it. Facebook 0 Twitter 0 Google Plus 0 Reddit 0.Documentation Help Center.
[SOLVED] Connection to TMS570LC4357
Each node contains a clock that controls its internal operation. When you enable distributed clocks, EtherCAT designates one clock in the network as the reference clock. The EtherCAT distributed clock DC algorithm then synchronizes the operation of multiple network nodes to the reference clock. The DC algorithm operates in two phases.
In phase 1, the algorithm aligns the clocks of DC-enabled network nodes other than the master node with the clock of the first DC-enabled slave node. In phase 2, the algorithm aligns the remaining unaligned clock with the reference clock.
Do not manually adjust the sample time of the real-time application in either master shift mode or bus shift mode. In master shift mode, the reference clock is the clock of the first DC-enabled slave in the network. In phase 1, the algorithm shifts the sample time of the network nodes to align with the clock of the first slave node. In phase 2, the algorithm shifts the sample time of the master stack running on the target computer to align with the first slave node clock.
In bus shift mode, the reference clock is the clock of the master stack running on the target computer. In phase 1, the algorithm shifts the sample time of the DC-enabled network nodes to align with the clock of the first DC-enabled slave node. In phase 2, the algorithm shifts the sample time of the first DC-enabled slave node to align with the clock of the master stack.
The algorithm shifts the sample time of the other network nodes to stay aligned with the first slave node clock. EtherCAT Init. Choose a web site to get translated content where available and see local events and offers. Based on your location, we recommend that you select:. Select the China site in Chinese or English for best site performance.
Other MathWorks country sites are not optimized for visits from your location. Get trial now. Toggle Main Navigation. Search Support Support MathWorks. Search MathWorks. Off-Canvas Navigation Menu Toggle. Master Shift Mode In master shift mode, the reference clock is the clock of the first DC-enabled slave in the network. Select a Web Site Choose a web site to get translated content where available and see local events and offers.
Select web site.So when an uncorrectable ECC is detected in cache, the line is only invalidated and the correct data data is reloaded from the L2 memory no data is lost. That is perfect to make ECC uncorrectable errors transparent to the system and increase the availability. Can anyone confirm or explain to me if I am correct on that point? I didn't generate a fatal ECC error yet, my assumptions are only theoretical based on the documentation.
Site Search User.
Thank you, Gael. Reply Cancel Cancel. Hi everyone, Does anyone have an idea about my current interrogations? Thanks, Gael. Up 0 Down Reply Accept answer Cancel. More questions in this forum. All recent questions Unread questions Questions you've participated in Questions you've asked Unanswered questions Answered questions Questions with suggested answers Questions with no replies.
Not Answered. FPU version in cortex-R52 0. Started 1 month ago by Jahnavi Guvvala. Suggested Answer. Latest 2 months ago by Poz1. Best Processor 0. Latest 3 months ago by Andy Neil. Home automation 0 Smart Homes.
Latest 4 months ago by 42Bastian Schick.FIQ is not used. Whenever the multiple interrupts occur at the same time, phantom interrupt is called and then after it is stuck there only.
Also We would like to know if this is the bug identified in this OS version and it is fixed in the later versions. Please explain what is happening on the IRQ pins. The user application has to mask out lower priority interrupts.
The frequency of the PWM signal is set to 20kHz. Also the controller is configured to receive the serial bytes through SCI4 using the receive IRQ interrupt at baudrate.
We have also observed that whenever the incoming serial bytes are blocked then the controller operates as expected, TMS Controller will not call the phantom interrupt ISR. That implies this case is called. We have identify the reason for calling the phantom interrupt. Viewing 5 posts - 1 through 5 of 5 total. April 24, at Arun Prakash Participant.
Regards -Arun. Farukh Chaudhry Participant.Hercules Tutorial: CAN Communication
Regards FC. April 25, at Regards, FC. April 26, at This function declaration is given as below. Also, please let us know your solution for this issue. You must be logged in to reply to this topic.The device can drive one DC motor or other OPA The OPA family of single, dual and quad operational amplifiers represents a new generation of general purpose, low-power operational amplifiers.
Texas Instruments' DAC and DAC are low-cost, precision, fully-integrated and bit digital-to-analog converters DACs designed to meet the requirements of industrial process-control applications. Texas Instruments' DRV provides an integrated motor driver solution for cameras, consumer products, toys, and other low-voltage or battery-powered motion control applications.
Search Circuit. Section Supplier Datasheet. Toggle navigation Digchip. Besides the typical pin toggle approach, where the duration between two pin toggles is measured, e.
This application report describes a software-based approach to move the exception vector table from the flash int Doc. Junction temperature monitoring is the only recommended use for these on-chip temperature sensors. It also explains the configurations, the different algorithm test durations and the influence on current consumptions. This Flash is protected by single error correction double e Doc. This document provides the device configuration and layout recommendations to achieve the best Doc.
The SPI bootloader is a small piece of code that can be programmed at the beginning of Flash to act as an application loader as well as Doc. A reference implementation by ARM and an adjusted example implementation suitable for Hercules-based Doc. A Doc. Detailed code exampl Doc. In a Doc. A Digital and Analog input pins require protection from input voltages that are negative or positive exceeding the maximum input levels. This is a practical explanation of using the Electrostatic Discharge ESD protection diodes that are part of the input p Doc.
The application report shows the N2HE Doc. This allows the inputs to be sampled by the analog-to-digital converters ADC in synch with the timer events, which is a critical requirement in control applic Doc.
B Unbuffered multiplexed ratiometric analog-to-digital converters ADC have strict requirements on driving source impedance that are not always obvious.
This application report addresses the trade-offs between source impedance and sample rate. It includes b Doc. A The application report provides help to design a safety system with both the Hercules safety microcontrollers and the TPS power supply.PDF Extract from the document. PDF3. PDFKbFile published: Jan 18, This application report demonstrates how to use the on-chip temperature sensors for junction temperature monitoring.
Junction temperature monitoring is the only recommended use for these on-chip temperature sensors. This application report describes the CAN protocol used in the bootloader and details each supported command. PDFKbFile published: Jul 26, It is quite common, especially when developing an application based on an entry level microcontroller, to prioritize peripheral usage based on the application's functional requirements. It may be the case that all of the available UARTs on a device are used for functional purposes, leaving no UARTs available for the developer to use for logging debug messages.
This application report demonstrates. PDF1. Finally, it shows code excerpts of the setup to run the simple example code. This document. PDF95 KbFile published: Jul 5, This application report describes a method to dynamically increase device frequency in a way that minimizes voltage dips on the board power supply.
PDFKbFile published: Apr 23, This application report describes what nested interrupts are and how a re-entrant interrupt handler can be implemented on Hercules-based microcontrollers.
Datasheet Texas Instruments TMS570LC4357
A reference implementation by ARM and an adjusted example implementation suitable for Hercules-based microcontrollers will be compared and discussed. This document assumes that you have some basic understanding of the different operating m. The content also covers both hardware and software timing restrictions of the N2HET module with the black-box driver configuration. This document provides the device configuration and layout recommendations to achieve the best performance of the embedded ADC.
These include layout requirements on power and ground, decoupling and bypass capacitor requirement. There is an additional feature to allow fully erased all 1's or fully program. This allows the inputs to be sampled by the analog-to-digital converters ADC in synch with the timer events, which is a critical requirement in control applications. This application report includes an example program that illustrates a way to maximize the sampling rate for a set of three analog inp.
It only takes a minute to sign up. From the Reference Document :. This reference guide provides the specifications for a bit configurable synchronous multi-buffer serial peripheral interface MibSPI. The MibSPI is, in effect, a programmable-length shift register used for high speed communication between external peripherals or other microcontrollers.
Its multi-buffer allows multiple transmissions with different peripherals without any CPU action. Standard SPI communication doesn't support individual setting for communication with each of the Slave devices connected with the master device.
There are also some other useful settings like inter-frame delay time, SPI mode, data direction etc. Sign up to join this community.
The best answers are voted up and rise to the top. Home Questions Tags Users Unanswered. Ask Question. Asked 4 years, 3 months ago. Active 1 year, 10 months ago.
TMS570LC4357: VIM/Arm Core interaction (phantom IRQ) with Micrium OS III
Viewed 3k times. The physical layer is the same, right? Active Oldest Votes. Sign up or log in Sign up using Google. Sign up using Facebook. Sign up using Email and Password. Post as a guest Name. Email Required, but never shown.
The Overflow Blog. The Overflow How many jobs can be done at home? Featured on Meta. Community and Moderator guidelines for escalating issues via new response…. Feedback on Q2 Community Roadmap. Related 3.
Hot Network Questions. Question feed.